1) Field of the Invention
The present invention relates to a high frequency multiplier suitable for the use in modulation/demodulation circuits, frequency converters, and the like.
2) Description of the Related Art
Various multipliers each of which outputs a product of two signals have been proposed. For example, Japanese Patent Publication No. 48-20932 discloses a typical multiplier.
FIG. 12 is an electrical circuit diagram showing an example of a balanced input-type multiplier. Referring to FIG. 12, the multiplier includes a pair of first and second transistors Q11 and Q12 connected differentially to each other, a pair of third and fourth transistors Q13 and Q14 connected differentially to each other, and a pair of fifth and sixth transistors Q15 and Q16.
A constant current CC is connected to the emitters of the first and second transistors Q11 and Q12. A load resistor Rc2 is connected to the collectors of the third and fifth transistors Q13 and Q15. A load resistor Rc1 is connected to the collectors of the fourth and sixth transistors Q14 and Q16. A first input signal is inputted to the bases of the third to sixth transistors Q13 to Q16. A second input signal is inputted to the bases of the first and second transistors Q11 and Q12. A first output signal having product information of the first input signal and the second input signal is outputted from the node at which the load resistor Rc2 is connected to the collectors of the third and fifth transistors Q13 and Q15 while a second output signal having product information of the first input signal and the second input signal is outputted from the node at which the load resistor Rc1 is connected to the collectors of the fourth and sixth transistors Q14 and Q16.
That is, when the first input signal is A cos .omega.1t and the second input signal is B cos .omega.2t, the multiplier outputs an output signal of K.multidot.A cos .omega.1t.multidot.B cos .omega.2t, where A and B are an amplitude, respectively, .omega.1 and .omega.2 are an radian frequency, respectively, t is time, and K is a constant.
Since the output signal, K.multidot.A cos .omega.1t.multidot.B cos .omega.2t, is (1/2)K.multidot.A.multidot.B {cos (.omega.1-.omega.2)t+cos (.omega.1+.omega.2)t}, both a signal of (.omega.1+.omega.2) and a signal of (.omega.1-.omega.2) are outputted as an output signal, respectively, whereby an output amplitude is determined by a constant K.
However, there is a disadvantage in that the multiplier described above, which is basically formed of 6 transistors, causes its large circuit scale, thus resulting in increased current consumption and complicated wiring. Particularly, since many cross connections included in the multiplier cause unnecessary coupling, the multiplier cannot have good characteristics in higher frequency band.